Senior Staff FPGA Engineer
CesiumAstro, El Segundo, CA
Salary not disclosed
Lead levelFirmware
Design, verify, and deploy FPGA solutions for high-speed signal processing and data streaming in space communication systems, with responsibility for complex digital cores and clock domain management. You need expert-level HDL design and verification experience, ideally with digital signal processing background.
Posted September 24, 2026 (3w ago)