Synthesis & STA Engineer – High-Speed SerDes
Astera Labs, San Jose, California, United States
$160,000 – $200,000 / year
below the median for senior electronics roles
Senior levelElectronics
Design and verify high-speed SerDes circuits for AI infrastructure connectivity solutions, performing synthesis and static timing analysis of complex signal paths. Apply power optimization and multi-rate clocking expertise to deliver robust chip performance.
Posted September 14, 2026 (5w ago)