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Tech Lead, STA

Astera Labs, Hyderabad, Telangana, India

Salary not disclosed

Lead levelElectronics

You will own top-level timing closure and signoff for next-generation connectivity silicon across advanced process nodes, driving full-chip STA strategy. This Tech Lead role requires 6-14 years of experience ensuring timing success on complex SoCs.

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Posted September 15, 2026 (2w ago)

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