Full-Chip Physical Design Verification Engineer
Tenstorrent, Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
$100,000 – $500,000 / year
above the median for testing roles
Testing
You will lead full-chip physical verification signoff and ensure manufacturability across advanced technology nodes, debugging issues with industry PV tools and collaborating with RTL, layout, CAD, and packaging teams. The role focuses on achieving successful tapeouts with high-quality silicon.
Posted May 1, 2026 (5mo ago)