Physical Design Engineer
Etched, San Jose
$200,000 – $300,000 / year
above the median for mid electronics roles
Mid levelElectronics
Own block-level ASIC implementation and verification, driving timing closure and power-performance-area optimization while supervising third-party design work. Improve design flows, collaborate with RTL designers, and ensure accountability for block-level closure.
Posted August 11, 2025 (14mo ago)