Senior Digital Design Engineer
Astera Labs, San Jose, California, United States
Salary not disclosed
Senior levelElectronics
You will perform digital logic design for connectivity ASICs, using industry tools to implement and optimize complex digital systems. You need expertise in RTL design, digital design flows, Synopsys/Cadence tools, and experience with high-speed connectivity or switch design.
Posted September 28, 2026 (4d ago)